1. Field of the Invention
The present invention relates to a fabricating method of a plasma display panel, and more particularly to a fabricating method of a plasma display panel which might simplify the fabricating process of a substrate.
2. Description of the Related Art
Recently, Flat Panel Displays have briskly been developed, which include Liquid Crystal Displays (hereinafter ‘LCD’), Field Emission Displays (hereinafter ‘FED’), Plasma Display Panels (hereinafter ‘PDP’). The PDP among them has advantages of easy production due to its simple structure, excellence of high brightness and high light-emission efficiency, memory function, and wide viewing angle of over 160°, in addition, being realized into a large screen of over 40 inches.
FIG. 1 is a diagram representing a discharge cell of a three-electrode AC surface discharge PDP of prior art.
Referring to FIG. 1, the discharge cell includes a scan/sustain electrode 34Y and a common sustain electrode 34Z formed on an upper substrate 46 and an address electrode 32X formed on a lower substrate 44. The lower substrate 44 is shown by being rotated in a 90 degree arc.
The sustain electrode pair 34Y, 34Z includes a transparent electrode 34A and a bus electrode 34B. The bus electrode 34B has a double layer structure of a black material layer 34I and an electrode material layer 34J.
An upper dielectric layer 42 and a protective film 40 are deposited on the upper substrate 46 on which the scan/sustain electrode 34Y and the common sustain electrode 34Z are formed in parallel. Wall charges being generated upon plasma discharge are accumulated in the upper dielectric layer 42.
The protective film 40 increases the discharge efficiency of secondary electron as well as protects the upper dielectric layer 42 from being damaged by the sputtering generated upon plasma discharge. The protective film 40 is usually magnesium oxide MgO.
A lower dielectric layer 48 and barrier ribs 38 are formed on the lower substrate where the address electrode 32X is formed. A phosphorus layer 36 is spread over the surface of the lower dielectric layer 48 and the barrier ribs 38. The address electrode 32X is formed in a direction of crossing the scan/sustain electrode 34Y and the common sustain electrode 34Z.
The barrier ribs 38 is formed along the address electrode 32X in parallel to prevent ultraviolet rays and visible rays from leaking into adjacent discharge cells, wherein the ultraviolet rays and visible rays are formed by discharge.
Any one of red R, green G or blue B visible rays is generated in the phosphorus layer 36, wherein the generated visible ray is excited by the ultraviolet ray generated upon plasma display. Inert gas is injected for gas discharge into a discharge space provided between the upper substrate 46, the lower substrate 44 and the barrier ribs 38.
A black matrix 52 is formed along the sustain electrode pair 34Y, 34Z on the upper dielectric layer 42 of such a PDP in order to improve the contrast of screen.
The black matrix 52 absorbs an external light being between and the transmitted light inside adjacent discharge cells, thus the improvement of its chroma and contrast can be made. Also, the black matrix 52 should be black because it is a visible light absorbing body.
The black matrix 52 is formed by a printing method or a photo-sensitivity method to be around 5 μm in height, wherein photosensitive resin, solvent and metal such as ruthenium Ru and Cobalt Co on a PbO group glass of low temperature which has its usual transition point below 400° C.
FIGS. 2A to 2G are diagrams representing a fabricating method of an upper substrate of a plasma display panel according to prior art.
Firstly, the transparent electrode 34A is formed, as shown in FIG. 2A, by patterning after depositing transparent conductive material on the upper substrate 46. The black material layer 34I with low conductivity is printed and then dried, as shown in FIG. 2B, in order to cover the transparent electrode 34A on the upper substrate 46 where the transparent electrode 34A is formed. Subsequently, the black material layer 61 corresponding to a transmitting part 60B is exposed by use of a first photo mask 60 having a shielding part 60A and a transmitting part 60B on the black material layer 34I, as shown in FIG. 2C.
Subsequently, the electrode material layer 34J is printed on the upper substrate 46 and then dried, as shown in FIG. 2D, wherein the partially exposed black material layer 34I has been formed on the upper substrate 46. And then, the black material layer 34I and the electrode material layer 34J overlapping with the transmitting part 7DB are exposed by use of a second photo mask 70 having a shielding part 70A and a transmitting part 70B, as shown in FIG. 2E. The exposed black material layer 34I and the electrode material layer 34J are is patterned by a development process and then go through a firing process to form the bus electrode 34B and the black matrix 52, as shown in FIG. 2F. Herein, the bus electrode 34B has a two layer structure of the black material layer 34I and the electrode material layer 34J, and the black matrix 52 has a single layer structure of the black material layer 34I.
The upper dielectric layer 42 is formed, as shown in FIG. 2G, by spreading a dielectric material over the upper substrate 46 where the sustain electrode pair 34Y, 34Z and the black matrix 52 are formed.
Then, the protective film 40 is formed, as shown in FIG. 2H, by spreading magnesium oxide over the upper dielectric layer 42, wherein the magnesium oxide is a protective material.
However, upon the fabricating process of the upper plate of a prior art PDP, there occurs a problem that impurities including dust in the air are mixed into each material layer in several processes such as the printing and drying of the black material layer 34I and the printing and drying of the electrode material layer 34J. Also, a few mask processes are required in order to form the upper plate of the prior art PDP. Especially, at least two mask processes including exposure process and development process are required to form the bus electrode and the black matrix, thus there occurs a problem that the process becomes complex and the process time lengthen.